Technical Director/Sr Principal Engineer, Power IC Architecture (San Jose)

Analog Group
San Jose, CA

San Jose, CA; Chandler, AZ or Seattle, WA

Our client is one of the fastest growing companies in the Semiconductor industry. They are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. They cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers. Their portfolio of technology helps efficiently power our world come join their team and see how YOU can make a difference.

They are seeking an exceptional Principal Engineer, DCDC/PMIC Architecture to drive innovation and development in power management solutions at the system level. This role involves defining architectures, optimizing power devices, enhancing efficiency, developing loop control strategies, and collaborating with cross-functional teams for cutting-edge power management integrated circuits (PMICs). The ideal candidate will have deep expertise in DC-DC converters, power efficiency, and control systems.

This role offers a unique opportunity to shape the future of power management technology while working with a team of world-class engineers who are driven by innovation, collaboration, and results. As a senior engineer in this role, you will be expected to lead by example, motivate your team members, and drive innovation forward.

Key Responsibilities:

  • System Architecture Development: Define, optimize, and improve power management architectures for high-performance applications, ensuring efficiency, reliability, and scalability.
  • Power Device Design & Optimization: Work on power devices including MOSFETs, GaN, and SiC technologies to enhance efficiency and thermal performance.
  • Loop Control & Stability: Develop, analyze, and validate control loops for DC-DC converters ensuring dynamic stability, transient response, and noise performance.
  • Efficiency & Power Management: Define power management strategies to optimize efficiency, minimize losses, and enhance power delivery for various applications.
  • Simulation & Modeling: Utilize tools such as SPICE, MATLAB, Simulink, or other similar software for modeling, simulation, validation of power systems, and data analysis.
  • Collaboration: Work closely with IC designers, firmware engineers, system architects, and cross-functional teams to co-optimize hardware and software integration.
  • Industry Trends & Innovation: Stay up to date with emerging trends in power management such as digital power control, wide-bandgap semiconductors, AI-driven power optimization, and other related technologies.

Qualifications:

  • Ph.D. in Electrical Engineering, Power Electronics, or a related field.
  • 8+ years of experience in power management design, DC-DC converters, and system architecture.
  • Deep understanding of power topologies (Buck, Boost, Flyback, LLC, etc.).
  • Expertise in control theory, loop compensation, stability analysis, and statistical modeling.
  • Hands-on experience with power devices (GaN, SiC, LDMOS) and efficiency optimization.
  • Strong analytical and problem-solving skills with proficiency in simulation tools such as ADS, PSpice, or similar software.
  • Excellent communication, teamwork, coaching, and leadership skills.

Preferred Experience:

  • Experience with PMIC products development.
  • Knowledge of data center power architectures.
  • Familiarity with firmware and digital control for power systems.

If you have interest to learn more on this opportunity please reply or reach out direct to:

#J-18808-Ljbffr
Posted 2025-08-10

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