CPU Physical Design - Low Power Signoff Engineer

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > CPU Engineering

Overview

As a leading technology innovator, Qualcomm pushes the boundaries of what\'s possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm CPU Engineer, you will lead CPU design efforts with a critical impact across industries. Qualcomm Engineers collaborate with cross-functional teams to design, verify, and implement multi-core CPU operations for all Qualcomm Business Units.

Responsibilities

• Complete ownership on Conformal Low Power and Formal Verification signoff for hierarchical and flat CPU Subsystems on latest nodes.
• Handle CLP and FV signoff from synthesis to PNR exit; perform signoff knowledge in STA, Power analysis, FV, low power verification, PV, etc.
• Collaborate with teams to validate constraints, verification, STA, and physical design; resolve issues independently.
• Lead block-level or chip-level Physical Design, STA, and PDN activities; work independently in RTL to GDSII implementation.
• Apply knowledge of low power flow (power gating, multi-Vt flow, power supply management) and deep sub-micron design challenges (leakage power, signal integrity, DFM).
• Possess strong problem-solving skills and ability to deliver technical work with a small team of engineers.

Minimum Qualifications

• Bachelor\'s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of hardware/software/electrical/systems engineering experience.
• Or Master\'s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of related experience.
• Or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of related experience.
• 2+ years of hardware engineering experience or related work experience.
• 2+ years of experience with PNR flow and CLP/FV runs in latest tech nodes (e.g., 4nm/5nm/7nm/10nm).
• Hands-on experience in signoff domains– LEC/CLP flows; good knowledge of Synthesis, Floorplanning, PNR, and STA flows.
• Good knowledge of Placement/Clock Tree Synthesis (CTS), optimization, and Unix/Linux– Perl/TCL scripting.

Other Information

Qualcomm is an equal opportunity employer. Qualcomm provides reasonable accommodations for individuals with disabilities during the application process upon request. Applicants are required to comply with applicable security and confidentiality requirements.

Pay range and Other Compensation & Benefits: $148,300.00 - $222,500.00. Salary is one component of total compensation, which includes annual discretionary bonus opportunities and RSU grants. Benefits details are discussed with the recruiter.