Si TD memory Quality and Reliability Engineer
- **Welcome!**## .Si TD memory Quality and Reliability Engineer page is loaded## Si TD memory Quality and Reliability Engineerlocations: US, California, Folsom: US, California, Santa Clara: US, Oregon, Hillsborotime type: Full timeposted on: Posted Todaytime left to apply: End Date: January 13, 2026 (6 days left to apply)job requisition id: JR0279342# **Job Details:**## Job Description:TD Quality and Reliability is at the forefront of driving innovative solutions and fostering a culture of excellence in quality and reliability for Intel. Our mission is to drive innovative quality, reliability technology solutions and culture for Intel. We are pioneers in developing industry-leading risk assessment methodologies and physics-based models to accurately predict component quality and reliability performance. **Role Overview:** The TD Memory Quality and Reliability team, a key component of the TD Quality and Reliability module team, focuses on ensuring the quality and reliability of memory arrays and IP. This includes leading-edge technology certification and characterization, process validation, design guidance, product EOL DPM projection, and reliability management. We are seeking a Senior TD Memory Quality and Reliability Engineer to lead technical efforts and provide expertise guidance across various areas of responsibility. **Key Responsibilities:*** Lead technology Vccmin and/or fuse certification efforts to meet the needs of both internal and foundry customers.* Investigate and understand reliability failure mechanisms and the underlying physics.* Analyze test chip Vccmin and/or fuse data to identify trends and potential issues, providing feedback to the process on conversion decisions and driving processes to meet certification requirements.* Characterize SRAM memory bit cell margin and noise; perform Sil2Sim for product design guidance. Characterize fuse programming and read margin.* Develop and enhance statistical modeling methods for Vccmin reliability. Engage and lead effort in Cert method definition/update for Vccmin/fuse.* Collaborate with cross-functional teams to ensure quality and reliability standards are met throughout the product lifecycle.* Communicate project status, technical findings, and recommendations to stakeholders, including process/LYA, device, design, and customers.* Drive continuous improvement initiatives to enhance quality and reliability processes and methodologies.* Provide technical leadership and mentorship to junior engineers and team members.**Behavior Traits:*** Proven ability to work with cross-functional teams and drive results.* Professional communication skills.* Excellent problem-solving skills and tolerance for ambiguity.**Note:** This role requires regular onsite presence to fulfill essential job responsibilities.## **Qualifications:**You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidate**Minimum Qualifications:*** Ph.D. in Electrical Engineering, Material Science, Physics, or a related field, with 3+ years of relevant experience in semiconductor device physics and data analysis.* **-OR-** Masters in Electrical Engineering, Material Science, Physics, or a related field, with 6+ years of relevant experience in semiconductor device physics and data analysis.Relevant experience in semiconductor device physics must include any of the following:* Proficient in using JMP.* Demonstrated knowledge of memory array design and testing.* Experience in quality and reliability methods and modeling.**Preferred Qualifications:*** Proficiency in scripting languages such as Python or JSL.* Experience in statistical modeling.## Job Type:Experienced Hire## Shift:Shift 1 (United States of America)## Primary Location:US, California, Folsom## Additional Locations:US, California, Santa Clara, US, Oregon, Hillsboro## Business group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.## Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.## ## Position of TrustN/A**Benefits:**We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:Annual Salary Range for jobs which could be performed in the US: $180,770.00-298,440.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.**Work Model for this Role**This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. \* Job posting details (such as work model, location or time type) are subject to change.
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