DFT CAD Engineer

Company: Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Join the CAD team at Qualcomm and advance the industry state of the art for DFT. Support the company-wide deployment of flows architected to enable leading process nodes. Work closely with cross-functional teams from design, production test and yield analysis.

Qualifications

• 5+ years of experience in DFT/DFD/DFX, MS or PhD degree in EE or related field, or equivalent experience
• Core DFT skills for this position include: scan insertion, Memory BIST implementation, JTAG/IJTAG, at-speed test, ATPG, fault simulation, silicon diagnostic, scan compression, IDL/PDL, SSN, SEQ, Core-based test methodology and IO wrapping, pattern retargeting
• Experience developing automation for DFT flow and architecting the DFT methodology.
• Strong coding experience with hands on experience using TCL, Python/Perl, Scripting, and strong analytical debug and problem-solving skills
• Good exposure with industrial DFT tools including Siemens, Synopsys or equivalent
• Deep understanding of SoC design, low power, timing exceptions and complex clock structures
• Strong analytical and debugging experience for ATPG DRC, product manufacturing pattern failures and Design for Debug concept and implementation
• Excellent team spirit, strong ownership and openness, highly motivated

Responsibilities

• Will be part of DFTCAD automation team, developing methodology and flows to support end-2-end DFT/DFX solution, and provide support and training
• Collaborate with SoC design, product and test engineer teams to drive standardization of DFT/ATPG methodology and flow across the company.
• Work closely with multiple EDA tool vendors to resolve day-2-day issues, help to drive vendor solution
• Collect and evaluate requirements with consideration of improving design flow efficiency, test quality and lower test cost to improve DFT flow and methodology

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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Pay range and Other Compensation & Benefits :

$140,000.00 - $210,000.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link .

If you would like more information about this role, please contact Qualcomm Careers .