Senior Security Architect
: Do you want to be at the forefront of innovating the latest hardware designs to propel Microsoft's cloud growth? Are you seeking a unique career opportunity that combines both technical capabilities, cross team collaboration, with business insight and strategy? Join our Strategic Planning and Architecture (SPARC) team within Microsoft's Azure Hardware Systems & Infrastructure (AHSI) organization and be a part of the organization behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's “Intelligent Cloud” mission. Microsoft delivers more than 200 online services to more than one billion individuals worldwide and AHSI is the team behind our expanding cloud infrastructure. We deliver the core infrastructure and foundational technologies for Microsoft's cloud businesses including Microsoft Azure, Bing, MSN, Office 365, OneDrive, Skype, Teams and Xbox Live. The SPARC organization manages Azure's hardware roadmap from architecture concept through production for all of Microsoft's current and future on-line services. This role is for a motivated Security Engineer with a background in security protocols and secure hardware design. You will be involved with all phases of product development, from secure silicon design through manufacturing and supply chain, and into high scale deployment. At the design phase, you will work with security threat model team, and be responsible for the silicon security architecture and design of low-level hardware accelerators. The Senior Security Architect should have design skills in defensive development and experience in the design of cryptographic protocols. This job involves coding and design of security protocols. The successful candidate should have experience with some or all of the following: RTL development, UVM, measured boot, hardware root of trusts, cryptoanalysis, PCIe architecture and SOC internal fabrics (eg. AXI, AHB etc.). Understanding silicon design primitives, memory protection, scheduling, interrupts, threading.
Responsibilities
- Architect infrastructure around other core technologies (Crypto blocks, Hardware key vaults or related core technologies) to work with the rest of the infrastructure based on throughput and latency requirements.
- Design and Validate the architectural solution with special focus on strong validation background in building Universal Verification Methodology (UVM) infrastructure and System Verilog based RTL design.
- Collaborate effectively with Firmware and Software teams to architect and design optimal solutions.
Qualifications
Required Qualifications:- 7+ years of technical engineering experience o OR Bachelor's degree in Electrical Engineering, Computer Engineering, or related field AND 5+ years of technical engineering experience o OR Master's degree in Electrical Engineering, Computer Engineering, or related field AND 3+ years of technical engineering experience o OR Doctorate degree in Electrical Engineering, Computer Engineering, or related field.
- 5+ years of professional experience designing & validating SOC internal blocks. SOCs can be CPU, GPU or networking devices .
- Demonstrable skill in Verilog, UVM, C, Python etc; Knowledge of Rust is good to have.
- Familiar with PCIe architecture as well as server architectures is a huge plus.
- Some level of understanding on DFD/DFT solutions in a SOC s a plus
- Background in Firmware or Software is a plus.
- Knowledge of server system platform architecture helps.
- Ability to debug and resolve issues spanning multiple subsystems
- Open to learn newer areas.
- Solid problem solving, debugging and troubleshooting skills, advanced design and development skills.
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