SerDes Optical System Architect - 16982

Category Engineering Hire Type Employee Job ID 16982 Base Salary Range $209000-$313000 Remote Eligible No Date Posted 05.27.2026

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years where electrical meets optical, where theory meets silicon, and where a good model saves months of debug. You know that SerDes at 128Gbps or 200Gbps is about margin, jitter, equalization, and decisions that either hold together or fall apart when the link goes live. You have built MATLAB models that actually predicted lab results, not just what should have happened, and you understand why that matters.

You are comfortable talking CDR loop dynamics with analog designers and explaining link budgets to customers. You do not need perfect specs to start. You build the model or algorithm that moves the design forward. When silicon measurements do not match simulation, you figure out why.

At Synopsys, you will work on SerDes IP powering PCIe Gen6+ and 200G+ Ethernet in optical systems that ship. The team is deep, the problems are hard, and what you architect matters.

What You'll Be Doing

• Build and maintain SerDes system models in MATLAB/Simulink for NRZ and PAM4 optical links
• Run sign-off simulations across PCIe 128Gbps+ and Ethernet 200Gbps+ protocols to verify performance
• Design calibration and adaptation algorithms to tune transceiver performance
• Correlate simulation with silicon measurements and iterate models
• Support customers on system-level performance and optical integration issues
• Work with analog, digital, and hardware teams across all development stages

The Impact You Will Have

• Your models define what gets built, catching issues before silicon respins
• You shape SerDes IP performance for hyperscale data centers, AI infrastructure, and next-generation networking
• Your algorithms enable real-time adaptation, improving yield and margin
• You close the simulation-to-silicon gap, reducing customer debug cycles
• Your customer work informs next-generation architecture
• You help Synopsys maintain leadership in high-speed optical SerDes
• You mentor engineers across analog, digital, and system domains

What You'll Need

• M.Sc. or Ph.D. in Electrical Engineering, Computer Engineering, or related field
• Deep expertise in one or more: optical specs (RTLR, LINEAR), SerDes modeling in MATLAB/Simulink for IMDD optical links, high-speed analog CMOS design, DSP for SerDes, or communications theory (equalization, coding, noise filtering)
• Experience analyzing link budgets for NRZ or PAM4 at 100Gbps+
• Hands-on work with SerDes Tx/Rx architectures, equalization (FFE/DFE/CTLE), or CDR loop dynamics
• Ability to correlate models with silicon and debug discrepancies
• Photonics modeling, optical interfacing, or lab testing experience is a plus
• C, Verilog-A, or SystemVerilog familiarity is a plus

Who You Are

• You absorb circuit-level tradeoffs in design reviews and know exactly what to update in your model
• You ask whether corner cases are covered, channels are realistic, and margin will hold in production
• You explain link budgets to non-experts clearly and show why it matters
• You manage multiple protocol sign-offs and customer issues without dropping threads
• You push back when specs are unclear or assumptions do not match physics
• You connect dots from photonics and analog to DSP and protocols

The Team You'll Be Part Of

You will be part of an R&D team developing bleeding edge NRZ and PAM4 SerDes transceivers targeting PCIe 128Gbps+ and Ethernet 200Gbps+ specifications for optical applications. You will work with a cross-functional team of analog and digital designers and hardware engineers across all stages of development, from modeling and sign-off to silicon correlation and customer support. This team is part of Synopsys' Silicon IP business, which delivers the world's broadest portfolio of IP to help customers integrate more capabilities, meet unique performance and power requirements, and get differentiated products to market quickly with reduced risk.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.