Physical Design Engineer

About the TeamOpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform.About the Role We are seeking a highly skilled Physical Design Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next-generation AI accelerators.You’ll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon’s performance and cost efficiency, as well as the team’s execution velocity and quality.In this role, you will:Develop, build and own tools, flows and methodologies for physical implementationOwn physical implementation of floorplan blocks from floorplanning to final signoffCollaborate with RTL designers to drive optimal block implementation solutionsAnalyze and optimize design for timing, power, and area trade-offs, working in collaboration with EDA vendors and ASIC partnersQualifications:BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology developmentDemonstrated success in taping out complex silicon designsHands-on experience with block physical implementation and PPA convergenceStrong coding experience with python, bazel, TCLStrong experience building physical design tools, flows and methodologiesStrong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure.Deep familiarity with industry-standard tools and flows for physical synthesis, PNR, LEC and power estimationBonus:Experience with AI or HPC-focused chipsExperience with optimizing PPA for high performance compute coresHands-on experience with top-level design methodologiesTo comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.About OpenAIOpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an