Staff FPGA Design Engineer

About our Client

Responsibilities:

• Collaborate with Radar, Communications, and RF engineers to define, implement, and test various signal processing algorithms and digital logic functions in FPGAs
• Work with HW Design Engineers and Embedded SW engineers to rapidly prototype and bring up satellite payloads that combine FPGA, processors, firmware, sensors, and networking functionality
• Take full responsibility for executing RTL design with or without HLS (High-Level Synthesis), physical implementation, timing closure, and validation through simulation
• Create robust software infrastructure using modern coding techniques to ensure that FPGA images seamlessly integrate into our hardware platform's Board Support Package while also functioning independently

Basic Qualifications:

• B.S in Electrical or Computer Engineering
• 11+ years of experience in modern FPGA design, implementation, and verification
• Solid understanding of FPGA logic Synthesis, partitioning, routing and timing closure
• Excellent teamwork and communication skills
• Learns new concepts rapidly, completely, and in a self-directed manner
• High levels of self-motivation and personal accountability
• Ability to work in a fast-paced environment under significant time constraints
• Experience in FPGA or ASIC design in VHDL, Verilog, or SystemVerilog
• Experience with FPGA tools, preferably Xilinx Vivado

Preferred Skills and Experience:

• Master's degree in Electrical or Computer Engineering
• 6+ years of FPGA prototyping experience (compilation, debugging and throughput tuning) on Xilinx/Altera/Lattice Semiconductor FGPAs
• Strong logic design, RTL coding (Verilog / VHDL), and debugging skills
• Familiar with design constraints, logic synthesis, timing closure analysis, and clock/reset domain crossing checks
• Proficiency with FPGA synthesis and implementation tools (e.g. Xilinx Vivado, Altera Quartus II), HDL simulators (VCS, Questa, IES), HDL Lint tools (e.g. Spyglass), and Power Analysis tools.
• Experience implementing fixed-point DSP blocks in RTL, such as IIR and FIR filters, modulator/demodulator, encoder/decoders PLLs, CORDIC operations and FFT processors, and CORDIC processors
• Familiarity with custom IP verification and integration
• Experience creating UVM-based test benches for verification of FPGA designs
• Familiarity with processor architecture and associated communications protocols such as AXI, DMA, I2C, UART, SPI, PCIE, USB, and Ethernet.
• Proficiency in scripting languages such as Python and Bash
• Experience with high-speed SERDES interfaces, Ethernet, and IP networking

ITAR Requirements:

• To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.